[Beowulf] Register article on Epyc

[Joe Landman]

Yeah, they should make very sweet storage units (single socket sku).  
Dual socket is also nice, as you'll have 64x lanes of fabric between 
sockets, as well as 64 from each socket to peripherals.

I'd love to see the QPI contention issue just go away.  This looks like 
it pushes back the problem quite a bit.   Doesn't solve it, but changes 
some of the limits.


On 06/21/2017 11:27 AM, Scott Atchley wrote:
> The single socket versions make sense for storage boxes that can use 
> RDMA. You can have two EDR ports out the front using 16 lanes each. 
> For the storage, you can have 32-64 lanes internally or out the back 
> for NVMe. You even have enough lanes for two ports of HDR, when it is 
> ready, and 48-64 lanes for the storage.
>
> On Wed, Jun 21, 2017 at 8:39 AM, John Hearns <hearnsj at googlemail.com 
> <mailto:hearnsj at googlemail.com>> wrote:
>
>     https://www.theregister.co.uk/2017/06/20/amd_epyc_launch/
>     <https://www.theregister.co.uk/2017/06/20/amd_epyc_launch/>
>
>     Interesting to see that these are being promoted as single socket
>     systems.
>     For a long time the 'sweet spot' for HPC has been the dual socket
>     Xeons.
>     I would speculate about single socket AMD systems, with a smaller
>     form facotr motherboard, maybe with onboard Infiniband.  Put a lot
>     of these cards in a chassis and boot them disklessly and you get a
>     good amoutn of compute power.
>
>     Also regarding compute power, it would be interesting to see a
>     comparison of a single socket of these versus Xeon Phi rather than
>     -v4 or -v5 Xeon.
>
>     The encrypted RAM modes are interesting, however I can't see any
>     use case for HPC.
>     Unless you are running a cloudy cluster where your customers are
>     VERY concerned about security.  Of course there are such customers!
>
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