eepro100 frame errors with SMP

[Alan Curry]

Alan Cox writes the following:
>
>The problem is - the short TX frames are almost certainly PCI bus access 
>related. That is the chip can't get to main memory in time to get the bytes
>it needs for the next piece of the packet before it empties its internal
>FIFO.
>
>So what on your bus has a PCI latency set to 240/248 ? 8)

I have no idea what that means. Is this something I can play with in /proc?

I can't believe these machines are having trouble keeping up with the eepro
card, since we have a test machine which is much smaller and it has no errors
even when it is getting forwarded all the traffic of both the other machines
put together and also doing a large-packet ping flood.

-- 
Alan Curry