[eepro100] Re: Transmitter Timeout -- addednum

[Andrey Savochkin]

Hello,

On Mon, Jul 31, 2000 at 08:31:02AM -0400, Kallol Biswas wrote:
> > 
> > If I understand right, you state that the hardware reads and caches the
> > command from the (i+1)th slot when it proceeds (i)th even if (i)th descriptor
> > has S bit in it, don't you?
> > If it does so, it's a very broken piece!
> > I don't know what documentation states about TX ring processing, but this
> > policy clearly contradicts the common sense!
> 
> Why does it contradict common sense? The S bit does not stop prefeteching,
> you could see it on a PCI logic analyzer. There are many I/O cards also
> that use the same S bit policy, but those cards also support NOP command, you
> don't have to put a NOP after each command but after evey cmd with S bit set.

I've always known that engineers and programmers have very different common
sense :-)
Well, why not to ask the driver developer to put 3 NOP commands after ones
with S bit?  It's not personal, but this logic really surprised me.  I would
never invented such a policy...

Certainly, driver can cope with almost any features of hardware (if the
developers know about them :-)
Speaking about i8255[789], I've checked the existing drivers, including
Intel's one, and didn't found any traces of placing NOPs after commands with
S bit to cope with the prefetching.  So, I suspect, it's just a feature of
the hardware you have at HP.

Best regards
		Andrey