[eepro100] Lockup with Intel PRO/100+ Dual Port Server Adapter

Thomas Lorenzen tl@theory.ki.ku.dk
Sat, 13 Jan 2001 20:47:56 +0100 (CET)


     Hi'

On Fri, 12 Jan 2001, Donald Becker wrote:

>>> On Fri, 12 Jan 2001, Thomas Lorenzen wrote:
>>> 
>>> > >>> What did you do to fix the problem on your machine?
>>> > 
>>> >    In the bios it was actually possible to specify the irq
>>> > numbers, which the system should assign to the different pci
>>> > slots. I then just assigned two times irq 9, and then the
>>> > two ports were configured to both use irq 9. Aparently,
>>> > however, that did not do such a good job anyway.
>>> 
>>> This sounded unusual until I read...
>>> 
>>> >    Ok, it is almost weekend here, so I will try v1.13 later
>>> > on and inform you later on.
>>> > 
>>> >    I have been suggested to try the stuff on a newer
>>> > machine. My test machine is an old 486. Do you have any idea
>>> > about, if that could solve the problem. When working
>>> > properly, the board is planned to go into a PIII SMP
>>> > machine.
>>> 
>>> Oooohhh, a 486.  Probably a SP3G with the Neptune chip set.
>>> 
>>> The one with the PCI burst bug.
>>> 
>>> The old Tulip driver had a work-around to limit the PCI burst size to
>>> less than a memory/cache line to avoid data corruption.
>>> The code looked like:
>>> 
>>> 	writel((x86 <= 4 ? 0x4810 : 0xE010), ioaddr + PCIBusCfg);
>>> 	if (x86 <= 4)
>>> 	    printk(KERN_INFO "%s: This is a 386/486 PCI system, setting cache "
>>> 			   "alignment to %x.\n", dev->name,
>>> 			   (x86 <= 4 ? 0x4810 : 0x8010));
>>> 
>>> This set cache alignment to 8 longwords and the burst limit to 8
>>> longwords.
>>> 
>>> You _might_ be able to see the same effect with the eepro100 driver
>>> setting the module options
>>>    txdmacount=8 rxdmacount=8
>>> 
>>> But I've never tried this.  The SP3G system was retired long ago.

   Well, I did learn, that using a too old machine as a test
bed for new hardware can be a bad idea. I just plugged the
dual port adapter in a new PIII machine, and that seems to
produce much much better results, although some details
puzzles me.

   I addition to the dual port adapter the PIII machine is
also equipped with a 3com adapter, which is eth0 below.
Entries eth1 and eth2 below steems from the dual port
adapter.

eth0      Link encap:Ethernet  HWaddr 00:01:02:B4:56:17  
          inet addr:192.168.200.114  Bcast:192.168.200.255 Mask:255.255.255.0
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:25935 errors:0 dropped:0 overruns:0 frame:0
          TX packets:16630 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:100 
          Interrupt:12 Base address:0xd800 

eth1      Link encap:Ethernet  HWaddr 00:03:47:3B:27:EE  
          inet addr:192.168.200.201  Bcast:192.168.200.255 Mask:255.255.255.0
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:1242 errors:0 dropped:0 overruns:0 frame:0
          TX packets:436 errors:0 dropped:0 overruns:4 carrier:0
          collisions:0 txqueuelen:100 
          Interrupt:9 

eth2      Link encap:Ethernet  HWaddr 00:03:47:3B:27:EF  
          inet addr:192.168.200.202  Bcast:192.168.200.255 Mask:255.255.255.0
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:866 errors:0 dropped:0 overruns:0 frame:0
          TX packets:801 errors:0 dropped:0 overruns:4 carrier:0
          collisions:0 txqueuelen:100 
          Interrupt:12 Base address:0x2000 

   What puzzles me is that eth1 and eth2 does not seem to
share the same irq, and that eth2 actually seems to share
irq with eth0. Output from /proc/interrupts is quoted below.

           CPU0       
  0:    2375510          XT-PIC  timer
  1:       3171          XT-PIC  keyboard
  2:          0          XT-PIC  cascade
  4:          0          XT-PIC  serial
  9:      13270          XT-PIC  eth1
 12:      55770          XT-PIC  eth0, eth2
 13:          1          XT-PIC  fpu
 14:          7          XT-PIC  ide0
NMI:          0

   I am quite of a newbie in this dual port adapter world,
so could you please tell me, if this is normal or standard
behaviour.

   When tested to my satisfaction, the dual port adapter is
planned to go into an IWILL DBD100 dual PIII motherboard
with INTEL BX440 chipset. The moterboard is at present
equipped with another intel ethernet adapter and an adaptec
scsi adapter, and in addition to that I now want to plug in
the dual port adapter. If you have any idea about, whether
or not that could pose a problem, I would very much
appreciate your opinion.

   Thanks for your help so far.

   Best Regards.

     Thomas.

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Cand. Scient. Thomas Lorenzen               Phone : (+ 45) 35 32 02 50
Department of Chemistry                       Fax : (+ 45) 35 32 02 59
University of Copenhagen                     Mail : tl@theory.ki.ku.dk
DK, 2100 Copenhagen, Denmark   Homepage : http://theochem.ki.ku.dk/~tl
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