This message is in MIME format. Since your mail reader does not understand this format, some or all of this message may not be legible. ------_=_NextPart_001_01C1065F.2CBB0B80 Content-Type: text/plain; charset="iso-8859-1" Hi Donald, Under what all conditions does the driver transition the chip from D0 to low power states and then what makes it recover ? Does it also go to sleep on link inactivity for a long time ? And are the wake up events the same as the ones described in the Intel 82559 datasheets namely ARP/direct IP and other packets and link status change ? Thanks, Manpreet. -----Original Message----- From: Donald Becker [mailto:becker@scyld.com] Sent: Thursday, July 05, 2001 10:51 PM To: Manpreet Singh Cc: 'eepro100@scyld.com' Subject: Re: [eepro100] Low power states in the 82559/82559ER chips On Thu, 5 Jul 2001, Manpreet Singh wrote: > Do we need any support in the eepro100 driver to make use of the D0 to D3 > low power states of the 82559ER chip ? My driver already uses the D2 power status while the interface is deactivated. > The Intel spec is confusing on this. This is pretty much standard behavior, so the datasheet (which one are you using?) might not cover it. > It is specified that the PME# signal is > enabled on a wake-up event. But I am not clear on whether the PME# > automatically triggers the chip into a D0 state ( from a D1 or D2 ) or does > the driver need to take note of this and change the state of the chip to D0. No, the chip stays in the same state. The driver is responsible for changing the chip's state to active. The code to do this is in the pci-scan.o support module that is required with my drivers. This isn't usually an issue, because suspend-to-memory isn't a common feature on current systems. Donald Becker becker@scyld.com Scyld Computing Corporation http://www.scyld.com 410 Severn Ave. Suite 210 Second Generation Beowulf Clusters Annapolis MD 21403 410-990-9993 ------_=_NextPart_001_01C1065F.2CBB0B80 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">RE: [eepro100] Low power states in the 82559/82559ER = chips Hi Donald,
Under what all conditions does the driver transition = the chip from D0 to low power states and then what makes it recover ? =
Does it also go to sleep on link inactivity for a = long time ? And are the wake up events the same as the ones described = in the Intel 82559 datasheets namely ARP/direct IP and other packets = and link status change ?
Thanks,
Manpreet.-----Original Message-----
From: Donald Becker [mailto:becker@scyld.com]
Sent: Thursday, July 05, 2001 10:51 PM
To: Manpreet Singh
Cc: 'eepro100@scyld.com'
Subject: Re: [eepro100] Low power states in the = 82559/82559ER chips
On Thu, 5 Jul 2001, Manpreet Singh wrote:
> Do we need any support in the eepro100 driver to = make use of the D0 to D3
> low power states of the 82559ER chip ?My driver already uses the D2 power status while the = interface is
deactivated.> The Intel spec is confusing on this.
This is pretty much standard behavior, so the = datasheet (which one are
you using?) might not cover it.> It is specified that the PME# signal is
> enabled on a wake-up event. But I am not clear = on whether the PME#
> automatically triggers the chip into a D0 state = ( from a D1 or D2 ) or does
> the driver need to take note of this and change = the state of the chip to D0.No, the chip stays in the same state. The = driver is responsible for
changing the chip's state to active. The code = to do this is in the
pci-scan.o support module that is required with my = drivers.This isn't usually an issue, because = suspend-to-memory isn't a common
feature on current systems.Donald Becker = = = becker@scyld.com
------_=_NextPart_001_01C1065F.2CBB0B80--
Scyld Computing Corporation = http://www.scyld.com
410 Severn Ave. Suite = 210 = Second Generation Beowulf = Clusters
Annapolis MD 21403 = = 410-990-9993