[vortex-bug] Tx int. mitigation
Donald Becker
becker@scyld.com
Thu, 14 Dec 2000 14:39:05 -0500 (EST)
On Thu, 14 Dec 2000, Bogdan Costescu wrote:
> On Thu, 14 Dec 2000, Donald Becker wrote:
> Let's see: 16 packets (a full ring), all max sized (1524 bytes), at 10
> MBit/s take 19.5 ms (I hope my math is OK) - and this is in the happy
> situation of no collisions. That's how the Tx mitigation would do with the
> current code (actually, only 15 packets because of the "bug" that
> started this thread).
You should be calculating the Tx gap the other way.
It only takes (10 minimum sized packets at 100Mbps) about 100usec to empty
the Tx queue.
You will wait until the next timer tick to refill.
The reason the Tx queue is full in the first place was that you had lots
of packets to be transmitted
> > ... I fear that
> > the code to handle potential race conditions is pretty ugly.
>
> If the ISR is only scavenging (not setting/clearing tbusy/tx_full), only
> dirty_tx needs to be modified. That's easier than the current situation.
The scavenge code is the first to know that the queue is non-full or
empty. Note that "empty" is too late -- it takes a while to restart and we
don't want a gap in transmission.
Donald Becker becker@scyld.com
Scyld Computing Corporation http://www.scyld.com
410 Severn Ave. Suite 210 Second Generation Beowulf Clusters
Annapolis MD 21403 410-990-9993