[tulip-bug] Admtek Comet (SMC1255TX) wierd errors on Alpha

[Juhan Ernits]

On Mon, 29 Apr 2002, Donald Becker wrote:

> Have you tried
>    http://www.scyld.com/network/tulip.html
>       ftp://www.scyld.com/pub/network/tulip.c

It appears that my problem is a non-standard "feature" of the SMC1255
card.

Well, now i played a bit around with the driver. It appears, that the
SMC1255TX  does not tolerate the default bus performance setting for
alpha. The excerpt of code in the end (copied directly from the latest
tulip.c) seems to work (the card seemed to work with the settings
csr0=0x00A04800 but apparently it can do better than that, since the card
works fine with the default x86 settings on x86 hardware)

So, although cache alignment 32 longwords, burst length 32 longwords
doesn't work ( csr0 = 0x01A00000 | 0xE000; ),
cache alignment 16 longwords, burst length 32 longwords does (csr0 = 0x01A00000 | 0xA000;)

My question now is if it is possible to differentiate this setting for
different boards on the same system within one module? 

Is there any point performancewise? 

What would be the best way to stresstest the new setting and find a kind
of optimum? 

Looking forward to your answer,

thankfully,

Juhan Ernits


Excerpt from tulip.c:


/*
  Set the bus performance register.
        Typical: Set 16 longword cache alignment, no burst limit.
        Cache alignment bits 15:14           Burst length 13:8
                0000    No alignment  0x00000000 unlimited
0800 8 longwords
                4000    8  longwords            0100 1 longword
1000 16 longwords
                8000    16 longwords            0200 2 longwords
2000 32 longwords
                C000    32  longwords           0400 4 longwords
        Warning: many older 486 systems are broken and require setting
0x00A04800
           8 longword cache alignment, 8 longword burst.
        ToDo: Non-Intel setting could be better.
*/

/*

#if defined(__alpha__)
static int csr0 = 0x01A00000 | 0xE000;
#elif defined(__i386__) || defined(__powerpc__) || defined(__sparc__)
static int csr0 = 0x01A00000 | 0x8000;
#else
#warning Processor architecture undefined!
static int csr0 = 0x00A00000 | 0x4800;
#endif

*/
# this setting seems to work for SMC1255TX on ruffian alpha
static int csr0 = 0x01A00000 | 0xA000;