[vortex-bug] Tx int. mitigation

[Bogdan Costescu]

Hi,

The mechanism for Tx mitigation is located at the end of start_xmit().
However, the current code (slighlty different in Don's drivers):

	if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1)
		vp->tx_full = 1;
	else { /* Clear previous interrupt enable. */
		prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
		clear_bit(0, (void*)&dev->tbusy);
	}

allows 2 packets marked as "generate an interrupt" when the ring is full.
These packets are neighbours (n-1 and n in the Tx ring, where n is the
last packet queued which filled the ring) so they generate 2 interrupts,
very soon one after the other, the first clearing the TX_RING_SIZE - 1
entries, and the second clearing 1 entry. Is this a bug or a feature ?

If it's a bug and only one packet per full ring should raise an interrupt,
the code should probably be:

	/* Clear previous interrupt enable. */
	prev_entry->status &= cpu_to_le32(~TxIntrUploaded);

	if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1)
		vp->tx_full = 1;
	else
		clear_bit(0, (void*)&dev->tbusy);

IOW, moving the TxIntrUploaded handling out of the 'if'.

Sincerely,

Bogdan Costescu

IWR - Interdisziplinaeres Zentrum fuer Wissenschaftliches Rechnen
Universitaet Heidelberg, INF 368, D-69120 Heidelberg, GERMANY
Telephone: +49 6221 54 8869, Telefax: +49 6221 54 8868
E-mail: Bogdan.Costescu@IWR.Uni-Heidelberg.De