[vortex-bug] Tx int. mitigation

[Giuseppe Ciaccio]

On Thu, 14 Dec 2000, Bogdan Costescu wrote:

> 
> Hi,
> 
> The mechanism for Tx mitigation is located at the end of start_xmit().
> However, the current code (slighlty different in Don's drivers):
> 
> 	if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1)
> 		vp->tx_full = 1;
> 	else { /* Clear previous interrupt enable. */
> 		prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
> 		clear_bit(0, (void*)&dev->tbusy);
> 	}
> 
> allows 2 packets marked as "generate an interrupt" when the ring is full.
> These packets are neighbours (n-1 and n in the Tx ring, where n is the
> last packet queued which filled the ring) so they generate 2 interrupts,
> very soon one after the other, the first clearing the TX_RING_SIZE - 1
> entries, and the second clearing 1 entry. Is this a bug or a feature ?
> 
> If it's a bug and only one packet per full ring should raise an interrupt,
> the code should probably be:
> 
> 	/* Clear previous interrupt enable. */
> 	prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
> 
> 	if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1)
> 		vp->tx_full = 1;
> 	else
> 		clear_bit(0, (void*)&dev->tbusy);

My personal opinion is:  we do not really need Tx IRQ.
In a generic start_xmit routine:

	if (there is "enough" room in the Tx ring) {
		/*  Most frequent case  */
		enqueue a packet;
		return(ok);
	}
	/*  Apparently not "enough" room in Tx ring  */
	try to free the tail of Tx ring as much as you can;
	if (there is room in the Tx ring) {
		enqueue a packet;
		return(ok);
	}
	/*  Really no room in Tx ring: must wait  */
	if (dev->tbusy not set) {
		/*  Maybe bad news: start countdown...  */
		dev->trans_start = current time;
		set dev->tbusy;    /*  or something like that  */
		return(try again);
	}
	/*  We were already waiting for Tx room...  */
	if (jiffies - dev->trans_start >= TX_TIMEOUT) {
		/*  Bad news!  */
		tx_timeout();
		return(error);
	}

What is wrong with the above algorithm?
Giuseppe


Giuseppe Ciaccio               http://www.disi.unige.it/person/CiaccioG/
DISI - Universita' di Genova   via Dodecaneso 35   16146 Genova,   Italy
phone +39 10 353 6638          fax +39 010 3536699 ciaccio@disi.unige.it
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